Hardware design of centralized three-phase inverter

Hardware design of centralized three-phase inverter

1). Selection of EMC filter parameters
In order to prevent high-order Noo waves from entering the grid and photovoltaic cell strings, and at the same time, to prevent strong interference on the grid and photovoltaic strings from affecting the normal operation of the inverter, EMI filters need to be installed on the AC side and the DC side. For the power of the converter, select an appropriate DC-side EMI filter and a liquid-side EMI filter. The standard EMI filter is usually a low-pass filter circuit composed of a series reactor and a parallel capacitor. Its function is to allow frequency signals during normal operation of the equipment to enter the equipment, while having a greater hindrance to high-frequency interference signals.

The most important technical indicator of an EMI filter is its ability to suppress interference. It is often expressed by the so-called Insertion Loss (Insertion Loss), which is defined as the power P1 transmitted from the interference source to the load when the filter is not connected. It is the ratio of the power P2 transmitted from the interference source to the load after the filter is connected, and the performance index and the insertion loss of the EMI filter are expressed by the division (dB). It is related to the network parameters of the filter network and the impedance of the source and load. Regardless of military or civil EMC standards, there are clear regulations on the conducted interference level of power lines of equipment or external systems. The difference between the EMI conducted interference level obtained by estimation or testing and the standard conducted interference level is required The minimum insertion loss of the EMI filter. However, it is obviously impossible in actual engineering to conduct EMC tests on different single devices, and then analyze the conduction interference characteristics and design filters that meet the requirements. In fact, the national standard stipulates that the power filter is inserted. The loss test method, under the standard test conditions, the general military power filter should meet the insertion loss of 30~60dB in the range of 10kHz~30MHz. Engineers only need to select the appropriate filter according to the actual situation.

For a 500kw three-phase grid-connected inverter, the DC side EMI filter selection model is B84142A16005081, and its parameters are Udc=1000V.Idc=1600A; the AC side EMI filter selection model is B84143B16005080, and its parameters are Uac=520V, Iac= 1600A.

2).Design of DC support capacitor
For a DC voltage of 700V, considering the voltage fluctuation, the DC support capacitor withstand voltage is designed to be 1000V. When SVPWM modulation is used, the ripple current Iinh of the DC support capacitor is calculated as follows:
M=Up/(2UDC1/π)=(π×221)/(2×460)=0.755 ——(1)
Iinh=I0√{(2√3/π²)M+[(8√3/π)﹣(18/π²)M]Mcos²θ} ——(2)
In the formula, M is the modulation ratio; Up is the peak value of the AC voltage, the line voltage is 270V; UDC1 is the lowest voltage in the MPPT range; I0 is the AC current.

According to the requirements of DC voltage dynamic response performance, under rated capacity operation, when the inverter suddenly adds 50% load, the carrier cycle is 278μs, and the maximum DC voltage fluctuation should be less than 5%, then the DC support capacitance value is calculated as follows:
C≥6737μF ——(3)
Choose a metal film capacitor of 420μF and a rated DC voltage of 1100V. This capacitor can meet the voltage requirements. Inquiring the capacitor’s data sheet shows that the capacitor has a rated ripple current of 50A at 75°C. Therefore, 16 capacitors are required in parallel. Considering the derating design, taking 2.5 times the margin, a total of 40 capacitors are selected, and the effective value of the rated ripple current is 50×40=2kА.

In the case of three groups of symmetrical designs, the number of DC support capacitors is an integer multiple of 3, which can be adjusted up and down the calculated value.

3).Design of IGBT circuit
The selection of IGBT needs to consider three factors; switching speed, rated voltage and rated current. When designing the IGBT circuit, the high-power three-phase photovoltaic grid-connected inverter does not have a Boost boost circuit. Each bridge arm of the inverter circuit is composed of an IGBT, and then a total of 6 IGBTs in the six bridge arms form a three-phase full bridge circuit. The rated output power of the inverter is P=500kw, and the AC output line voltage U=270V. According to the technical requirements of the 500kw photovoltaic inverter, the DC bus voltage is up to 850V. Considering that the turn-off peak may reach 1.2 times, the 1GBT resistance The voltage must exceed 850×1.2=1020V. The rated power of the system is 500kw, and the current flowing through 1GBT is
I=500000/√3U=1069A ——(4)
Under the rated power, the current flowing through each IGBT is 1069A. Considering the margin of 1.4 times or more, 1600A is selected. The highest terminal voltage is 850V (700V×1.2, the intermediate DC voltage of the inverter is 700V, considering a 20% margin).

According to the calculation of the above parameters, the IGBT selects FZ1600R12IP4 produced by Infineon, the basic parameter is 1600A/1200V/half bridge, and the number of equipment is 6.

In the IGBT circuit design process, a absorbing capacitor is connected in parallel at both ends of each 1GBT half-bridge circuit, which can suppress the voltage spike generated at the moment when the switch tube is turned off.

The two ends of the IGBT module are connected to the two poles of the DC absorption capacitor through a composite busbar. After the composite busbar is selected, not only can the overvoltage generated during the IGBT switching process be reduced, but also the electromagnetic interference can be reduced, and the electromagnetic compatibility (EMC) performance of the inverter can be improved.

4).The choice of absorbing capacitor
In order to eliminate the spike voltage caused by the stray inductance of the insulated gate bipolar transistor (IGBT) busbar and avoid damage to the insulated gate bipolar transistor, it is necessary to add a snubber capacitor in the circuit. The absorbing capacitor plays a role in the circuit similar to a low-pass filter, which can absorb the spike voltage.

The bus inductance and the stray inductance inside the snubber circuit and its components have a great influence on the 1GBT circuit, especially the high-power IGBT circuit. The selection of the absorbing capacitor should consider the use environment, that is, the circuit voltage and the absorbing frequency. For the sake of safety, the capacity should not be too large. The capacitor should be selected with good high frequency performance and fast response speed. The voltage level is the same as the IGBT level, generally 1200V DC. In order to obtain an accurate absorption capacitance value, the design is shown in Figure 1. The absorption circuit shown.

Hardware design of centralized three-phase inverter
Figure 1 Design drawing of absorbing capacitor

The characteristic of this absorption circuit is that it uses the topological structure of the traditional discharge prevention absorption circuit ingeniously. The two IGBT absorption capacitors of the same bridge arm are connected in series with the auxiliary discharge inductance and the clamping diode, and then cross-connected to the DC side input of the inverter. The overshoot energy on the absorption capacitor is transferred to the discharge inductance through oscillation, which not only limits the discharge impact, but also does not consume energy. At the same time, the discharge inductor has multiple allowable paths to feed energy back to the power supply or to the load. It can be seen that this circuit is suitable for high-power IGBT circuits.

The selection of the absorption capacitor Cx in this absorption circuit is the same as the selection principle of Cx in the traditional IGBT inverter absorption circuit, and its parameters are determined by the absorption voltage peak value ΔU allowed by the circuit. If the limit value of ΔU has been determined, formula (5) can be used to determine the value of C,:
Cs=(Lpi²)/△U² ——(5)
In the formula, Lp is the parasitic inductance of the bus, H; i is the turn-off current, Ao is selected as Lp=100nH, i=1000A, △U=59.2V, calculated as: Cs=-3μF.

Therefore, the absorption capacitance is selected as 3μF/1200V.

5).The design of the filter on the grid side
①Design of filter inductance The ripple coefficient of the output current of the photovoltaic grid-connected inverter determines the minimum value of the filter inductance. During rated operation, the current ripple is usually 15% to 20% of the peak current, and the value of this book is 15 %, the output line voltage is 270V, assuming the efficiency of the high-power three-phase photovoltaic grid-connected inverter is 98%, we can get:
△ILmax=σ×(√2Poutmax)/(Uout×η)=15%×(500000×√3×√2)/(270×98%)=695A ​​——(6)
In the formula, σ is the ripple current coefficient of the inductor; △ILmax is the ripple current of the inductor; Poutmax is the inverter output power: Uout is the effective value of the inverter output voltage; η is the output efficiency of the inverter.

△IL={[(μdc﹣μ0(t)]/L}×[D(t)/fs] ——(7)
In the formula, μdc is the DC bus voltage of the inverter; μ0 is the instantaneous voltage at the AC output of the inverter; L is the filter inductance; D(t) is the duty cycle of the inverter: fs is the switch of the inverter frequency. Because the power frequency of the inverter is much smaller than the switching frequency, you can get
μ0(t)=μdcD(t)+[1﹣D(t)]×(﹣μdc) ——(8)

And because the inverter circuit used in this design is bipolar, the duty cycle of each switching cycle can be expressed as:
D(t)=[μ0(t)+μdc]/2μdc ——(9)

From the above formula:
△LL=[μ²dc﹣μ²0(t)]/(2Lfsμdc) ——(10)
So when μ0(t)=0, the ripple current has the maximum value,
△ILmaxdc/2Lfs ——(11)

Due to the frequency limitation of the switching device, the inductance L is inconvenient to obtain too small, otherwise it will cause very severe current fluctuations, resulting in an increase in the harmonic content of the system output, and the main circuit cannot work normally at this time. Therefore, the filter The value of the inductance must satisfy the formula:
L≥μdc/2fs△ILmax ——(12)
Direct bus voltage μdc=700v, off frequency fs=3.6kHz, △ILmax=695A
L≥μdc/2fs△ILmax=700/(2×3.6×103×695)=139μH ——(13)

After calculation, the final inductance value is 140μH.

②Design of the filter capacitor For the higher harmonics higher than the corner frequency of the filter, the LC low-pass filter will attenuate at a speed of 40dB/dec. If you choose a corner frequency that is much lower than the switching frequency, it will have a more obvious suppression effect on harmonics. The switching frequency of the original design is 3.6kHz, and the corner frequency of the LC filter is 1500Hz, then:
fn=1/2π√LC=1500Hz ——(14)
C=1/L(2πfn)²=1/[140×10﹣6×(2π1500)²]=80μF ——(15)

Finally, the capacitance value is 80μF.

6). Summary of parameter design
The DC filter selection model is B84142A1600S081, and its parameters are Udc=1000V, Idc=1600A; the AC filter selection model is B84143B1600S080, and its parameters are Uac=520V.Iac=1600A.

DC side support capacitor: 420μF/1100V
Absorption capacitance: 3μF/1200V.
IGBT circuit design: The basic parameter is FF1600R121P4, and the number of equipment is 6.
LC filter design: the inductance value is 0.14mH, the capacitance value is 80μF.
The main material table is shown in Table 1.